The invention pertains to a digital phase detector.
U.S. Pat. No. 4,090,145 describes in principle one digital phase detector in which an analog-to-digital converter serves to convert the analog signal to be detected into a digital signal. The circuit includes a digital 90.degree. phase shifter, i.e., a Hilbert transformer or quadrture-signal generator, to which the digital signal is applied for forming the quadrature signal, a conditioning circuit for the digital and quadrature signals whose output provides corresponding digital quadrant signals x', y' belonging to the first x'-y' coordinate system half-quadrant, and a circuit delivering the arc-tan function of the quotient y'/x' and containing a read-only memory.
In this arrangement, the storage space needed in the read-only memory depends on the desired resolution of the analog-to-digital converter, i.e., on the number n of bits of the digital words to be processed; 2.sup.2 n memory locations (bits) are needed.
For the digital processing of video signals having words containing n=6 to 8 bits, 2.sup.7 to 2.sup.9 locations of the read-only memory are thus required. This requirement can be readily fulfilled with state-of-the-art semi-conductor technology. However, digital words containing more bits, e.g., n=13 to 17, as are desirable for the digital processing of audio signals, for example, require storage space for 2.sup.14 to 2.sup.18 bits, so that the chip area occupied by an integrated circuit containing the digital phase detector would be prohibitively large, i.e., with today's semi-conductor technology, such a chip could not be implemented at justifiable expense.